The present invention relates to a semiconductor device, to a method for evaluating the same, and to a method for fabricating the same by using the evaluation method.
Conventionally, the evaluation of an impurity profile has been performed by using a SIMS method which analyzes secondary electrons liberated from a sample upon the application of ions for analysis (primary ions).
The dimensions of a gate electrode in a semiconductor device have been measured after patterning for forming the gate electrode by using a system termed a critical dimension measurement SEM.
In a conventional method for fabricating a semiconductor device, on the other hand, the formation of a gate insulating film and the control of the film thickness of an offset spacer layer, which allows an amount of overlapping between the gate electrode and an impurity diffusion layer to be adjusted, have been performed by forming a monitor wafer and measuring a film thickness. In general, film thickness control has been performed also in another film forming step by measuring a film thickness on the monitor wafer.
However, the following problems are encountered by the conventional methods for evaluating and fabricating a semiconductor device.
If a SIMS method is used in a method for evaluating an impurity profile, it is difficult to evaluate an amount of horizontal expansion of the impurity profile since the SIMS method is implemented while grating a sample.
If critical dimension measurement SEM is used in a method for evaluating a gate electrode, an extremely long period of time is required since the dimensions of each of the gate electrode should be measured individually. If a gate electrode is evaluated in the course of the process of fabricating a semiconductor device, therefore, it is difficult to evaluate a sufficiently large number of samples. If overall evaluation is performed by measuring a limited portion of a gate electrode for a reduced measurement time, errors resulting from variations in the finished configuration of the gate electrode may occur.
If the film thickness control is performed only by measuring a film thickness on the monitor wafer in the steps of forming a gate insulating film and an offset spacer layer, unexpected impurity contamination, variations in the fabrication process, or the like may be unrecognized and a defect may occur in the semiconductor device since measurement is not performed in the semiconductor device for actual operation.